#ifndef DRIVERS_STORAGE_IDE_H #define DRIVERS_STORAGE_IDE_H /* IDE Types */ enum IDEType { IDE_ATA, IDE_ATAPI, }; /* LBA Modes */ enum LBAMode { LBA_CHS, LBA_28, LBA_48, }; /* IDE Poll Response Errors */ enum IDEPollError { ERROR_NONE, ERROR_GENERIC, ERROR_WRITE_FAULT, ERROR_NOT_READY, }; /* IDE Status Responses */ enum IDEStatus { IDE_SR_BUSY = 0x80, IDE_SR_READY = 0x40, IDE_SR_WRITE_FAULT = 0x20, IDE_SR_SEEK_COMPLETE = 0x10, IDE_SR_DATA_READY = 0x08, IDE_SR_CORRECTED_DATA = 0x04, IDE_SR_INDEX = 0x02, IDE_SR_ERROR = 0x01, }; /* IDE Commands */ enum IDECommand { IDE_CMD_READ_PIO = 0x20, IDE_CMD_READ_PIO_EXT = 0x24, IDE_CMD_READ_DMA = 0xC8, IDE_CMD_READ_DMA_EXT = 0x25, IDE_CMD_WRITE_PIO = 0x30, IDE_CMD_WRITE_PIO_EXT = 0x34, IDE_CMD_WRITE_DMA = 0xCA, IDE_CMD_WRITE_DMA_EXT = 0x35, IDE_CMD_CACHE_FLUSH = 0xE7, IDE_CMD_CACHE_FLUSH_EXT = 0xEA, IDE_CMD_PACKET = 0xA0, IDE_CMD_IDENTIFY_PACKET = 0xA1, IDE_CMD_IDENTIFY = 0xEC, }; /* IDE Identities */ enum IDEIdentity { IDE_IDENT_DEVICETYPE = 0, IDE_IDENT_CYLINDERS = 2, IDE_IDENT_HEADS = 6, IDE_IDENT_SECTORS = 12, IDE_IDENT_SERIAL = 20, IDE_IDENT_MODEL = 54, IDE_IDENT_CAPABILITIES = 98, IDE_IDENT_FIELDVALID = 106, IDE_IDENT_MAX_LBA = 120, IDE_IDENT_COMMANDSETS = 164, IDE_IDENT_MAX_LBA_EXT = 200, }; /* IDE Registers */ enum IDERegister { IDE_REG_DATA = 0x00, IDE_REG_ERROR = 0x01, IDE_REG_FEATURES = 0x01, IDE_REG_SECCOUNT0 = 0x02, IDE_REG_LBA0 = 0x03, IDE_REG_LBA1 = 0x04, IDE_REG_LBA2 = 0x05, IDE_REG_HDDEVSEL = 0x06, IDE_REG_COMMAND = 0x07, IDE_REG_STATUS = 0x07, IDE_REG_SECCOUNT1 = 0x08, IDE_REG_LBA3 = 0x09, IDE_REG_LBA4 = 0x0A, IDE_REG_LBA5 = 0x0B, IDE_REG_CONTROL = 0x0C, IDE_REG_ALTSTATUS = 0x0C, IDE_REG_DEVADDRESS = 0x0D, }; /* IDE Channels */ enum IDEChannel { IDE_PRIMARY, IDE_SECONDARY, }; struct IDEChannelRegs { uint16_t base; uint16_t ctrl; uint16_t busmaster; uint8_t noint; }; /* Structure for an IDE Device */ struct IDEDevice { uint8_t reserved; uint8_t channel; uint8_t drive; uint16_t type; uint16_t signature; uint16_t capabilities; uint32_t commandSets; uint32_t size; char model[41]; }; extern struct IDEChannelRegs ideChannels[]; extern struct IDEDevice ideDevices[]; uint8_t ide_read(uint8_t channel, uint8_t reg); void ide_write(uint8_t channel, uint8_t reg, uint8_t data); uint8_t ide_poll_status(uint8_t channel, uint32_t check); void ata_init(struct IDEDevice *dev); #endif