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// BarryServer : Git / Nucleus / commit / 232d0f9e7dd31316a9b91cbdfec0174afce40c7e / kernel / gdt.c

// Related

Nucleus

Barry ACPI + APIC 232d0f9 (3 years, 3 months ago)
diff --git a/kernel/gdt.c b/kernel/gdt.c
index 943ffa4..21fcc14 100644
--- a/kernel/gdt.c
+++ b/kernel/gdt.c
@@ -19,7 +19,7 @@
 static struct GDTEntry {
 	uint16_t limitLower, baseLower;
 	uint8_t baseMiddle, access, gran, baseHigher;
-} __attribute__((packed)) *GDT[MAX_CPUS]; /* Per CPU */
+} __attribute__((packed)) *gdt[MAX_CPUS]; /* Per CPU */
 
 /* Structure for a TSS Entry */
 static struct TSSEntry {
@@ -33,26 +33,20 @@ static struct TSSEntry {
 	uint32_t es, cs, ss, ds, fs, gs;
 	uint32_t ldt;
 	uint16_t trap, iomapBase;
-} __attribute__((packed)) *TSS[MAX_CPUS]; /* Per CPU */
+} __attribute__((packed)) *tss[MAX_CPUS]; /* Per CPU */
 
 /* Set a gate of the GDT */
 static void
 gdt_set_gate(uint8_t num, uint32_t base, uint32_t limit, uint8_t access,
              uint8_t gran)
 {
-	GDT[CPUID][num].baseLower = (base & 0xFFFF);
-	GDT[CPUID][num].baseMiddle = (base >> 16) & 0xFF;
-	GDT[CPUID][num].baseHigher = (base >> 24) & 0xFF;
-	GDT[CPUID][num].limitLower = (limit & 0xFFFF);
-	GDT[CPUID][num].gran = (limit >> 16) & 0x0F;
-	GDT[CPUID][num].gran |= gran & 0xF0;
-	GDT[CPUID][num].access = access;
-}
-
-/* Initialise the GDT */
-void
-init_gdt(void)
-{
+	gdt[CPUID][num].baseLower = (base & 0xFFFF);
+	gdt[CPUID][num].baseMiddle = (base >> 16) & 0xFF;
+	gdt[CPUID][num].baseHigher = (base >> 24) & 0xFF;
+	gdt[CPUID][num].limitLower = (limit & 0xFFFF);
+	gdt[CPUID][num].gran = (limit >> 16) & 0x0F;
+	gdt[CPUID][num].gran |= gran & 0xF0;
+	gdt[CPUID][num].access = access;
 }
 
 /* Load the GDT */
@@ -68,11 +62,11 @@ cpu_load_gdt(void)
 	off_t idx = CPUID % (PAGE_SIZE / size);
 	off_t block = (CPUID / (PAGE_SIZE / size)) * (PAGE_SIZE / size);
 	if (idx == 0)
-		GDT[CPUID] = (void *) alloc_frame();
+		gdt[CPUID] = (void *) alloc_frame();
 	else
-		GDT[CPUID] = (void *) GDT[block] + (size * idx);
+		gdt[CPUID] = (void *) gdt[block] + (size * idx);
 
-	memset(GDT[CPUID], 0, size);
+	memset(gdt[CPUID], 0, size);
 
 	gdt_set_gate(0, 0x00000000, 0x00000000, 0x00, 0x00); /* Null */
 	/* Ring 0 */
@@ -82,20 +76,20 @@ cpu_load_gdt(void)
 	gdt_set_gate(3, 0x00000000, 0xFFFFFFFF, 0xFA, 0xCF); /* Code */
 	gdt_set_gate(4, 0x00000000, 0xFFFFFFFF, 0xF2, 0xCF); /* Data */
 
-	uint32_t addr = (uint32_t) GDT[CPUID] + (sizeof(struct GDTEntry) * 6);
+	uint32_t addr = (uint32_t) gdt[CPUID] + (sizeof(struct GDTEntry) * 6);
 	gdt_set_gate(5, addr, sizeof(struct TSSEntry) - 1, 0xE9, 0);
 
-	TSS[CPUID] = (void *) addr;
-	TSS[CPUID]->ss0 = 0x10;
-	TSS[CPUID]->esp0 = 0xF0800000 - sizeof(uintptr_t);
-	TSS[CPUID]->cs = 0x08 | 0;
-	TSS[CPUID]->ds = TSS[CPUID]->es = TSS[CPUID]->ss = 0x10 | 0;
-	TSS[CPUID]->fs = TSS[CPUID]->gs = 0x10 | 3;
-	TSS[CPUID]->iomapBase = sizeof(struct TSSEntry);
+	tss[CPUID] = (void *) addr;
+	tss[CPUID]->ss0 = 0x10;
+	tss[CPUID]->esp0 = 0xF0800000 - sizeof(uintptr_t);
+	tss[CPUID]->cs = 0x08 | 0;
+	tss[CPUID]->ds = tss[CPUID]->es = tss[CPUID]->ss = 0x10 | 0;
+	tss[CPUID]->fs = tss[CPUID]->gs = 0x10 | 3;
+	tss[CPUID]->iomapBase = sizeof(struct TSSEntry);
 
 	struct DescRecord ptr = {
 		.limit = sizeof(struct GDTEntry) * 6,
-		.base = (uintptr_t) GDT[CPUID],
+		.base = (uintptr_t) gdt[CPUID],
 	};
 	asm volatile("lgdt %0" :: "m" (ptr));
 	asm volatile("ltr %w0" :: "q" (0x28 | 3));