Nucleus
Barry Kernel threads + threads share address space 6217f0d (3 years, 1 month ago)
diff --git a/kernel/acpi/apic.c b/kernel/acpi/apic.c
index 6051636..7f9935c 100644
--- a/kernel/acpi/apic.c
+++ b/kernel/acpi/apic.c
@@ -58,6 +58,7 @@ int apic = 0;
size_t ncpus = 1;
uintptr_t lapicPtr, ioapicPtr;
cpu_t lapicIds[MAX_CPUS], lapicNums[MAX_CPUS];
+extern uintptr_t stacks[];
/* Enable APIC */
static void
@@ -176,10 +177,11 @@ init_apic(struct SDTHeader *header)
uint32_t i, j;
uintptr_t apTrampoline = 0x1000, stack;
memcpy((void *) apTrampoline, &ap_trampoline, PAGE_SIZE);
+ *((uint32_t *) (apTrampoline + 0xFFC)) = (uintptr_t) stacks;
for (i = 1; i < ncpus; i++) {
/* Give each processor a separate stack */
- stack = alloc_frame() + PAGE_SIZE - sizeof(uintptr_t);
- *((uint32_t *) (apTrampoline + 0xF00 + i)) = stack;
+ stacks[i] = alloc_frame() + PAGE_SIZE;
+// *((uint32_t *) (apTrampoline + 0xC00) + i) = stacks[i];
/* Send INIT IPI */
LAPIC(0x280) = 0;
LAPIC(0x310) = (LAPIC(0x310) & 0x00FFFFFF)
@@ -239,5 +241,5 @@ send_ipi(cpu_t target, uint8_t num)
| (lapicIds[target] << 24);
LAPIC(0x300) = (LAPIC(0x300) & 0xFFF32000)
| (0x5000 + num + 48);
- while ((LAPIC(0x300) >> 12) & 1);
+ do asm("pause":::"memory"); while (LAPIC(0x300) & (1 << 12));
}
diff --git a/kernel/acpi/trampoline.S b/kernel/acpi/trampoline.S
index 3230e85..c807524 100644
--- a/kernel/acpi/trampoline.S
+++ b/kernel/acpi/trampoline.S
@@ -48,9 +48,8 @@ ap_pm:
incl %eax
movl %eax, apId
- movl $0x1F00, %esi
- movl (%esi,%eax), %ebx
- movl %ebx, %esp
+ movl 0x1FFC, %esi
+ movl (%esi,%eax,4), %esp
movl %esp, %ebp
sti
diff --git a/kernel/cpu.c b/kernel/cpu.c
index e7ab334..ba59986 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
@@ -34,6 +34,7 @@ void send_ipi(cpu_t target, uint8_t num);
Processor __seg_gs *const cpu = 0;
Processor *cpus[MAX_CPUS];
+uintptr_t stacks[MAX_CPUS];
/* Per-CPU setup */
void
diff --git a/kernel/gdt.c b/kernel/gdt.c
index 7e8a1a4..fbdfb82 100644
--- a/kernel/gdt.c
+++ b/kernel/gdt.c
@@ -33,7 +33,7 @@ static struct GDTEntry {
uint8_t baseMiddle, access, gran, baseHigher;
} __attribute__((packed)) *gdt[MAX_CPUS]; /* Per CPU */
-#define GDT_OFFSET(i) (i * sizeof(struct GDTEntry))
+#define GDT_OFFSET(i) ((i) * sizeof(struct GDTEntry))
/* Structure for a TSS Entry */
static struct TSSEntry {
@@ -83,6 +83,7 @@ cpu_load_gdt(void)
memset(gdt[CPUID], 0, size);
+ /* Create gate entries */
gdt_set_gate(GDT_NULL, 0x00000000, 0x00000000, 0x00, 0x00);
gdt_set_gate(GDT_KERN_CODE, 0x00000000, 0xFFFFFFFF, 0x9A, 0xCF);
gdt_set_gate(GDT_KERN_DATA, 0x00000000, 0xFFFFFFFF, 0x92, 0xCF);
@@ -91,20 +92,22 @@ cpu_load_gdt(void)
gdt_set_gate(GDT_FS, 0x00000000, 0xFFFFFFFF, 0xF2, 0xCF);
gdt_set_gate(GDT_GS, 0x00000000, 0xFFFFFFFF, 0xF2, 0xCF);
+ /* Create TSS entry */
uint32_t addr = (uint32_t) (gdt[CPUID] + (GDT_TSS + 1));
gdt_set_gate(GDT_TSS, addr, sizeof(struct TSSEntry) - 1, 0xE9, 0);
+ /* TSS */
tss[CPUID] = (void *) addr;
tss[CPUID]->ss0 = 0x10;
- tss[CPUID]->esp0 = 0xF0800000 - sizeof(uintptr_t);
tss[CPUID]->cs = GDT_OFFSET(GDT_KERN_CODE) | 0;
tss[CPUID]->ds = GDT_OFFSET(GDT_KERN_DATA) | 0;
tss[CPUID]->es = tss[CPUID]->ss = tss[CPUID]->ds;
tss[CPUID]->fs = tss[CPUID]->gs = GDT_OFFSET(GDT_FS) | 3;
tss[CPUID]->iomapBase = sizeof(struct TSSEntry);
+ /* Load table */
struct DescRecord ptr = {
- .limit = sizeof(struct GDTEntry) * (GDT_TSS + 1),
+ .limit = GDT_OFFSET(GDT_TSS + 1),
.base = (uintptr_t) gdt[CPUID],
};
asm volatile("lgdt %0" :: "m" (ptr));
@@ -132,3 +135,11 @@ set_gs_base(uintptr_t base)
gs->baseHigher = (base >> 24) & 0xFF;
asm volatile("mov %0, %%gs" :: "r" (GDT_OFFSET(GDT_GS) | 3));
}
+
+/* Set the used kernel stack */
+void
+set_kernel_stack(uintptr_t top)
+{
+ ASSERT((top & 0xF) == 0);
+ tss[cpu->id]->esp0 = top;
+}
diff --git a/kernel/idt.c b/kernel/idt.c
index 0f2bdfd..6e04543 100644
--- a/kernel/idt.c
+++ b/kernel/idt.c
@@ -31,10 +31,13 @@ install_idt_entry(uint8_t num, void *addr)
if (num < 32)
type = 0x8F; /* Trap gate for exceptions */
+ if (num == 0x80)
+ type |= 3 << 5; /* Allowed from ring 3 */
+
IDT[num].offsetLower = (uintptr_t) addr & 0xFFFF;
IDT[num].selector = 0x08;
IDT[num].zero = 0;
- IDT[num].typeAttr = type | 0x60; /* Allowed from ring 3 */
+ IDT[num].typeAttr = type;
IDT[num].offsetHigher = (uintptr_t) addr >> 16;
}
@@ -58,8 +61,13 @@ isr_handler(struct InterruptFrame frame)
/* Run registered handler */
int_handler_t handler = interrupts[frame.intnum];
- if (handler)
+ struct InterruptFrame *oldFrame;
+ if (handler) {
+ oldFrame = cpu->frame;
+ cpu->frame = &frame;
handler(&frame);
+ cpu->frame = oldFrame;
+ }
}
/* Register an exception handler */
diff --git a/kernel/start.S b/kernel/start.S
index 96048e2..fe842e8 100644
--- a/kernel/start.S
+++ b/kernel/start.S
@@ -9,9 +9,10 @@ header:
.long 0, 1280, 1024, 32
.section .bss, "aw", @nobits
+.global stackBottom
.global stackTop
stackBottom:
- .skip 16384
+ .skip 8192
stackTop:
.section .text