BarryServer : Git

All the code for all my projects
// BarryServer : Git / Orion / commit / d41a53cbc7d055b1c00cf0a339dbed6925f4f02c / drivers / pci.c

// Related

Orion

Barry Importing existing Orion kernel d41a53c (2 years, 4 months ago)
diff --git a/drivers/pci.c b/drivers/pci.c
new file mode 100644
index 0000000..22db76e
--- /dev/null
+++ b/drivers/pci.c
@@ -0,0 +1,55 @@
+/*
+ * This file contains the routines for accessing the PCI devices.  It just wraps
+ * the IO functions necessary to read/write the PCI Configuration Space.  It
+ * uses PCI Configuration Space Access Mechanism #1, which is the most supported
+ * access mechanism.
+ */
+
+#include <stdint.h>
+#include "pci.h"
+#include "../io.h"
+
+/* Read PCI config */
+uint8_t
+pci_read_byte(int bus, int dev, int func, int off)
+{
+	outl(0xCF8, (1 << 31) | (bus << 16) | (dev << 11) |
+	            (func << 8) | (off & 0xFC));
+	return inb(0xCFC + (off & 3));
+}
+uint16_t
+pci_read_word(int bus, int dev, int func, int off)
+{
+	outl(0xCF8, (1 << 31) | (bus << 16) | (dev << 11) |
+	            (func << 8) | (off & 0xFC));
+	return inw(0xCFC + (off & 2));
+}
+uint32_t
+pci_read_dword(int bus, int dev, int func, int off)
+{
+	outl(0xCF8, (1 << 31) | (bus << 16) | (dev << 11) |
+	            (func << 8) | (off & 0xFC));
+	return inl(0xCFC);
+}
+/* Write PCI config */
+void
+pci_write_byte(int bus, int dev, int func, int off, uint8_t value)
+{
+	outl(0xCF8, (1 << 31) | (bus << 16) | (dev << 11) |
+	            (func << 8) | (off & 0xFC));
+	outb(0xCFC + (off & 3), value);
+}
+void
+pci_write_word(int bus, int dev, int func, int off, uint16_t value)
+{
+	outl(0xCF8, (1 << 31) | (bus << 16) | (dev << 11) |
+	            (func << 8) | (off & 0xFC));
+	outw(0xCFC + (off & 2), value);
+}
+void
+pci_write_dword(int bus, int dev, int func, int off, uint32_t value)
+{
+	outl(0xCF8, (1 << 31) | (bus << 16) | (dev << 11) |
+	            (func << 8) | (off & 0xFC));
+	outl(0xCFC, value);
+}